David J. Lilja

Professor Emeritus of Electrical and Computer Engineering, University of Minnesota

Minneapolis, Minnesota, United States of America

Research Expertise

Computer architecture
high-performance parallel processing
computer systems performance analysis
approximate computing
Hardware and Architecture
Software
Electrical and Electronic Engineering
Signal Processing
Information Systems
Computers in Earth Sciences
Computer Networks and Communications
Computer Science Applications
Education
storage systems
faculty development
curriculum review

About

**Research Expertise** Computer architecture, high-performance parallel processing, computer systems performance analysis, approximate computing, computing with emerging technologies, and storage systems. **Biographical summary** David J. Lilja received a Ph.D. and an M.S., both in Electrical Engineering, from the [University of Illinois at Urbana-Champaign,](http://www.uiuc.edu/) and a B.S. in Computer Engineering from [Iowa State University](http://www.iastate.edu/) in Ames. He is Professor Emeritus of [Electrical and Computer Engineering](http://www.ee.umn.edu/) at the [University of Minnesota](http://www.umn.edu/) in Minneapolis. He previously served as a member of the graduate faculties in [Computer Science](http://www.cs.umn.edu/), [Scientific Computation](http://www.scicomp.umn.edu/), and [Data Science](http://datascience.umn.edu//).  He served ten years as the head of the ECE department at the University of Minnesota, worked as a research assistant at the Center for Supercomputing Research and Development at the [University of Illinois,](http://www.uiuc.edu/) and as a development engineer at [Tandem Computers Incorporated](http://www.tandem.com/) in Cupertino, California.  He received a [Fulbright](http://www.fulbright.org/) Senior Scholar Award to visit the University of Western Australia and was a visiting Professor at the University of Canterbury in Christchurch, New Zealand. He has chaired and served on the program committees of numerous conferences.  He was elected a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) and a Fellow of the American Association for the Advancement of Science (AAAS) for contributions to the statistical analysis of computer performance. He also is a registered Professional Engineer.

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Publications

Measuring Computer Performance
Unknown Venue
2000
MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research
IEEE Computer Architecture Letters
2002
An Architecture for Fault-Tolerant Computation with Stochastic Logic
IEEE Transactions on Computers
2011
BloomFlash: Bloom Filter on Flash-Based Storage
2011 31st International Conference on Distributed Computing Systems
2011
Data prefetch mechanisms
ACM Computing Surveys
2000
Computation on Stochastic Bit Streams Digital Image Processing Case Studies
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2014
The superthreaded processor architecture
IEEE Transactions on Computers
1999
Accelerating Lattice Boltzmann Fluid Flow Simulations Using Graphics Processors
2009 International Conference on Parallel Processing
2009
Cache coherence in large-scale shared-memory multiprocessors
ACM Computing Surveys
1993
Using stochastic computing to implement digital image processing algorithms
2011 IEEE 29th International Conference on Computer Design (ICCD)
2011
A statistically rigorous approach for improving simulation methodology
The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings.
Exploiting basic block value locality with block reuse
Proceedings Fifth International Symposium on High-Performance Computer Architecture
1999
Challenges in computer architecture evaluation
Computer
2003
Simulation of computer architectures: simulators, benchmarks, methodologies, and recommendations
IEEE Transactions on Computers
2006
When caches aren't enough: data prefetching techniques
Computer
1997
Adapting the SPEC 2000 Benchmark Suite for Simulation-Based Computer Architecture Research
Workload Characterization of Emerging Computer Applications
2001
Characterizing and Comparing Prevailing Simulation Techniques
11th International Symposium on High-Performance Computer Architecture
Exploiting the parallelism available in loops
Computer
1994
Wireless sensor network for aircraft health monitoring
First International Conference on Broadband Networks
So many states, so little time: verifying memory coherence in the Cray X1
Proceedings International Parallel and Distributed Processing Symposium
Techniques for obtaining high performance in Java programs
ACM Computing Surveys
2000
Characterization of communication patterns in message-passing parallel scientific application programs
Lecture Notes in Computer Science
1998
SARD: A statistical approach for ranking database tuning parameters
2008 IEEE 24th International Conference on Data Engineering Workshop
2008
The future of simulation: a field of dreams
Computer
2006
Dynamic scheduling techniques for heterogeneous computing systems
Concurrency: Practice and Experience
1995
Logical Computation on Stochastic Bit Streams with Linear Finite-State Machines
IEEE Transactions on Computers
2014
Dynamic task scheduling using online optimization
IEEE Transactions on Parallel and Distributed Systems
2000
Direct communication between magnetic tunnel junctions for nonvolatile logic fan-out architecture
Applied Physics Letters
2010
High performance solid state storage under Linux
2010 IEEE 26th Symposium on Mass Storage Systems and Technologies (MSST)
2010
Accelerating geoscience and engineering system simulations on graphics hardware
Computers & Geosciences
2009
The synthesis of complex arithmetic computation on stochastic bit streams using sequential logic
Proceedings of the International Conference on Computer-Aided Design
2012
A Hardware Implementation of a Radial Basis Function Neural Network Using Stochastic Logic
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015
2015
Energy-Efficient Convolutional Neural Networks with Deterministic Bit-Stream Processing
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)
2019
Using Stochastic Computing to Reduce the Hardware Requirements for a Restricted Boltzmann Machine Classifier
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
2016
Performing Stochastic Computation Deterministically
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2019
Low-Cost Sorting Network Circuits Using Unary Processing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2018
IIR filters using stochastic arithmetic
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014
2014
Time-Encoded Values for Highly Efficient Stochastic Circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2017
Deterministic methods for stochastic computing using low-discrepancy sequences
Proceedings of the International Conference on Computer-Aided Design
2018
Approximate Communication
ACM Computing Surveys
2018
Characterizing datasets for data deduplication in backup applications
IEEE International Symposium on Workload Characterization (IISWC'10)
2010
Trends in shared memory multiprocessing
Computer
1997
Performance analysis of single‐phase, multiphase, and multicomponent lattice‐Boltzmann fluid flow simulations on GPU clusters
Concurrency and Computation: Practice and Experience
2010
The synthesis of linear Finite State Machine-based Stochastic Computational Elements
17th Asia and South Pacific Design Automation Conference
2012
JaViz: A client/server Java profiling tool
IBM Systems Journal
2000
Large Block CLOCK (LB-CLOCK): A write caching algorithm for solid state disks
2009 IEEE International Symposium on Modeling, Analysis & Simulation of Computer and Telecommunication Systems
2009
Improving processor performance by simplifying and bypassing trivial computations
Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors
Extending value reuse to basic blocks with compiler support
IEEE Transactions on Computers
2000
Designing Digital Computer Systems with Verilog
Unknown Venue
2004
Microarchitecture-aware floorplanning using a statistical design of experiments approach
Proceedings. 42nd Design Automation Conference, 2005.
2005
A compiler-assisted data prefetch controller
Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040)
The synthesis of combinational logic to generate probabilities
Proceedings of the 2009 International Conference on Computer-Aided Design
2009
Self-Adjusting Scheduling: An On-Line Optimization Technique for Locality Management and Load Balancing
1994 International Conference on Parallel Processing (ICPP'94)
1994
A reconfigurable stochastic architecture for highly reliable computing
Proceedings of the 19th ACM Great Lakes symposium on VLSI
2009
Improving Computer Architecture Simulation Methodology by Adding Statistical Rigor
IEEE Transactions on Computers
2005
Neural Network Classifiers Using Stochastic Computing with a Hardware-Oriented Approximate Activation Function
2017 IEEE International Conference on Computer Design (ICCD)
2017
Magnetic Tunnel Junction Logic Architecture for Realization of Simultaneous Computation and Communication
IEEE Transactions on Magnetics
2011
An effective processor allocation strategy for multiprogrammed shared-memory multiprocessors
IEEE Transactions on Parallel and Distributed Systems
1997
Instruction prefetching of systems codes with layout optimized for reduced cache misses
Proceedings of the 23rd annual international symposium on Computer architecture
1996
Spintronic logic gates for spintronic data using magnetic tunnel junctions
2010 IEEE International Conference on Computer Design
2010
Coarse-grained speculative execution in shared-memory multiprocessors
Proceedings of the 12th international conference on Supercomputing
1998
Von Neumann Computers
Wiley Encyclopedia of Electrical and Electronics Engineering
1999
Complexity and performance in parallel programming languages
Proceedings Second International Workshop on High-Level Parallel Programming Models and Supportive Environments
Exploring Performance Characteristics of the Optane 3D Xpoint Storage Technology
ACM Transactions on Modeling and Performance Evaluation of Computing Systems
2020
An FPGA implementation of a Restricted Boltzmann Machine classifier using stochastic bit streams
2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP)
2015
A low power fault-tolerance architecture for the kernel density estimation based image segmentation algorithm
ASAP 2011 - 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors
2011
Temperature-aware floorplanning of microarchitecture blocks with IPC-power dependence modeling and transient analysis
Proceedings of the 2006 international symposium on Low power electronics and design - ISLPED '06
2006
Evaluating Benchmark Subsetting Approaches
2006 IEEE International Symposium on Workload Characterization
2006
Changing interaction of compiler and architecture
Computer
1997
Quantized neural networks with new stochastic multipliers
2018 19th International Symposium on Quality Electronic Design (ISQED)
2018
US patent depository libraries programme
World Patent Information
1989
Romano
Proceedings of the Third ACM Symposium on Cloud Computing
2012
Towards Theoretical Cost Limit of Stochastic Number Generators for Stochastic Computing
2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
2018
High Quality Down-Sampling for Deterministic Approaches to Stochastic Computing
IEEE Transactions on Emerging Topics in Computing
2021
A stochastic reconfigurable architecture for fault-tolerant computation with sequential logic
2012 IEEE 30th International Conference on Computer Design (ICCD)
2012
Comparing Exact and Approximate Spatial Auto-regression Model Solutions for Spatial Data Analysis
Geographic Information Science
2004
Teaching computer systems performance analysis
IEEE Transactions on Education
2001
Memory module-level testing and error behaviors for phase change memory
2012 IEEE 30th International Conference on Computer Design (ICCD)
2012
JavaSpMT: A speculative thread pipelining parallelization model for Java programs
Proceedings 14th International Parallel and Distributed Processing Symposium. IPDPS 2000
Accurate statistical approaches for generating representative workload compositions
IEEE International. 2005 Proceedings of the IEEE Workload Characterization Symposium, 2005.
Dynamic scheduling strategies for shared-memory multiprocessors
Proceedings of 16th International Conference on Distributed Computing Systems
The potential of compile-time analysis to adapt the cache coherence enforcement strategy to the data sharing characteristics
IEEE Transactions on Parallel and Distributed Systems
1995
Spin-Hall effect MRAM based cache memory: A feasibility study
2015 73rd Annual Device Research Conference (DRC)
2015
Buffer Requirements at ECN-Capable RED Gateways to Minimize Packet Losses
2005 IEEE International Conference on Electro Information Technology
The NanoBox project: exploring fabrics of self-correcting logic blocks for high defect rate molecular device technologies
IEEE Computer Society Annual Symposium on VLSI
Combining hardware and software cache coherence strategies
Proceedings of the 5th international conference on Supercomputing - ICS '91
1991
Exploiting the Prefetching Effect Provided by Executing Mispredicted Load Instructions
Euro-Par 2002 Parallel Processing
2002
TNT-NN: A Fast Active Set Method for Solving Large Non-Negative Least Squares Problems
Procedia Computer Science
2017
PASS: A Hybrid Storage System for Performance-Synchronization Tradeoffs Using SSDs
2012 IEEE 10th International Symposium on Parallel and Distributed Processing with Applications
2012
Using incorrect speculation to prefetch data in a concurrent multithreaded processor
Proceedings International Parallel and Distributed Processing Symposium
Coarse-grained thread pipelining: a speculative parallel execution model for shared-memory multiprocessors
IEEE Transactions on Parallel and Distributed Systems
2001
Exploring sub-block value reuse for superscalar processors
Proceedings 2000 International Conference on Parallel Architectures and Compilation Techniques (Cat. No.PR00622)
Instruction-level parallelism in Prolog
Proceedings of the 19th annual international symposium on Computer architecture - ISCA '92
1992
Using Resampling Techniques to Compute Confidence Intervals for the Harmonic Mean of Rate-Based Performance Metrics
IEEE Computer Architecture Letters
2010
Evaluating the efficacy of statistical simulation for design space exploration
2006 IEEE International Symposium on Performance Analysis of Systems and Software
Efficient execution of parallel applications in multiprogrammed multiprocessor systems
Proceedings of International Conference on Parallel Processing
High-speed stochastic circuits using synchronous analog pulses
2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC)
2017
Linear Regression Using R: An Introduction to Data Modeling
Unknown Venue
2016
Kinetic Action: Performance Analysis of Integrated Key-Value Storage Devices vs. LevelDB Servers
2017 IEEE 23rd International Conference on Parallel and Distributed Systems (ICPADS)
2017

Education

University of Illinois Urbana-Champaign

Ph.D., Electrical Engineering

Urbana, Illinois, United States of America

University of Illinois Urbana-Champaign

M.S., Electrical Engineering

Urbana, Illinois, United States of America

Iowa State University

B.S., Computer Engineering

Ames, Iowa, United States of America

Experience

University of Minnesota - Twin Cities

Professor

Department Head

University of Canterbury, Christchurch, New Zealand

Visiting Professor

University of Western Australia, Perth, Australia

Visiting Professor

IBM, Rochester, Minnesota

Visiting Senior Engineer

Tandem Computers, Inc., Cupertino, CA

Development Engineer

Links & Social Media

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